Or they will sue Intel over graphics
by Lars-Göran Nilsson 17 March 2008
We've heard from a very reliable source that Nvidia is expecting that Intel will give them a license for the new QuickPath Interconnect, which will replace the current Direct Media Interface used in today's Intel chipsets due to extensive changes in Intel's CPU design in the upcoming Nehalem core. Nvidia is currently using HyperTransport for communication between its chipsets, even on the Intel platform, but the chipset to CPU inteface will change with Nehalem, as Intel is moving to an integrated memory controller. Currently, Intel hasn't licensed the QuickPath Interconnect to Nvidia or any other motherboard chipset manufacturer. Nvidia is sure that Intel will give them a license, as if they won't, then Nvidia is considering suing Intel over graphics patent infringements that they claim Intel has done. We don't have the full details, but the only thing we can tell from this is that the Nvidia and Intel battle is heating up.
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Tuesday, March 18, 2008
AMD responds to Intel’s roadmap
Move along, nothing to see here
By Ambrose McNevin: Tuesday, 18 March 2008
RANDY ALLEN, Corporate veep of the server and workstation division at AMD was happy to pour cold water over yesterday’s announcements from Chipzilla. In an interview with The Inq at HP's Tech@work conference in Barcelona Allen said: “On Nahalem, Intel is catching up with what we have. Barcelona is here. It is shipping with the largest number of OEMs we’ve ever had. We have level three cache, we've had integrated memory since 2003 and high speed serial links since 2006. I don‘t think there is anything new here.” On Dunnington Allen said that AMD’s forthcoming Shanghai will be 45nm. “In 2009 we will have enhancement to hyper threading with HT3, DDR3 technology and eight cores or more. We’ll have six cores by the end of the year and you can expect to see eight cores in the 2009 timeframe,” he said.
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By Ambrose McNevin: Tuesday, 18 March 2008
RANDY ALLEN, Corporate veep of the server and workstation division at AMD was happy to pour cold water over yesterday’s announcements from Chipzilla. In an interview with The Inq at HP's Tech@work conference in Barcelona Allen said: “On Nahalem, Intel is catching up with what we have. Barcelona is here. It is shipping with the largest number of OEMs we’ve ever had. We have level three cache, we've had integrated memory since 2003 and high speed serial links since 2006. I don‘t think there is anything new here.” On Dunnington Allen said that AMD’s forthcoming Shanghai will be 45nm. “In 2009 we will have enhancement to hyper threading with HT3, DDR3 technology and eight cores or more. We’ll have six cores by the end of the year and you can expect to see eight cores in the 2009 timeframe,” he said.
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Intel tweaks SSE 4 to speed text processing
By Tony Smith 18th March 2008
Intel's 45nm 'Nehalem' processor design will incorporate the second generation of the chip maker's SSE 4 technology. For now, the company is calling the post-'Penryn' Streaming SIMD Extensions instruction set SSE 4.2. Nehalem's implementation of SSE 4 essentially matches that of Penryn. The key additions centre on the Application-Targeted Accelerators (ATAs) Intel introduced as part of SSE 4. Penryn got two of these, Nehalem will get seven more. Nehalem's ATAs centre on text and string processing, Intel said yesterday. The need to accelerate text handling may sound rather unnecessary in this era of pervasive multimedia and intensive 3D graphics apps, but Intel claims the ATAs will benefit a range of important tasks, from virus signature scanning to parsing XML files. Its pitch is that these are everyday routines, and the faster Nehalem can run them not only the quicker the tasks will be completed but the sooner it can close down on-die components to conserve energy.
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Intel's 45nm 'Nehalem' processor design will incorporate the second generation of the chip maker's SSE 4 technology. For now, the company is calling the post-'Penryn' Streaming SIMD Extensions instruction set SSE 4.2. Nehalem's implementation of SSE 4 essentially matches that of Penryn. The key additions centre on the Application-Targeted Accelerators (ATAs) Intel introduced as part of SSE 4. Penryn got two of these, Nehalem will get seven more. Nehalem's ATAs centre on text and string processing, Intel said yesterday. The need to accelerate text handling may sound rather unnecessary in this era of pervasive multimedia and intensive 3D graphics apps, but Intel claims the ATAs will benefit a range of important tasks, from virus signature scanning to parsing XML files. Its pitch is that these are everyday routines, and the faster Nehalem can run them not only the quicker the tasks will be completed but the sooner it can close down on-die components to conserve energy.
Read more here-->Link
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